I. Field of the Invention
This invention relates to a semiconductor integrated circuit device and more particularly to improvements in a protective device for protecting an insulated gate field effect transistor against overvoltages.
II. Description of the Prior Art
Conventionally, as shown in FIGS. 1A, 1B and 1C, there is illustrated a semiconductor protective device for protecting an active element such as an insulated gate field effect transistor (IGFET) against overvoltages.
The prior art arrangement comprises an IGFET 2 which is to be protected including a gate electrode G connected through a protective resistor R to input terminal 1. The resistor R is formed by diffusing an N type impurity into the P type semiconductor substrate 3 on which the IGFET 2 has been formed. A channel stopper 7 of P.sup.+ type impurity is provided under field oxide layer 9 but not under the MOS transistor 2 and resistor R. The channel stopper 7 prevents leakage current.
If an excessive voltage higher than the breakdown voltage of the gate insulating film of the IGFET 2 is applied to the input terminal 1, the PN junction between the resistor N.sup.+ region 4 and the P substrate is designed to begin to breakdown. But, if the voltage is excessively high, such as may be caused by a voltage surge, the PN junction between the N.sup.+ resistor region 4 and the P type substrate 3 is destroyed and the MOS transistor does not operate. The destruction tends to occur at the portion 8 between the N.sup.+ resistor region 4 and the P.sup.+ channel stopper 7 because the impurity concentration of the P.sup.+ channel stopper 7 is higher than that of the P type substrate 3.
Accordingly, the semiconductor integrated circuit will no longer work when an input signal is applied to the input terminal 1.